1. Field of the Invention
The present invention generally relates to a method for cleaning a wafer, and more particularly to a method for avoiding the formation of a silicon recess in SDE (source/drain extension)-junction regions.
2. Description of the Prior Art
Every wafer process step is a potential source of contamination, which may lead to defect formation and device failure. Cleaning of wafers must take place after each processing step and before each high-temperature operation, which make it the most frequently repeated step in IC (Integrated Circuit) manufacturing. This surface preparation includes cleaning before and after etching, oxidation, deposition, photoresist stripping, and post-CMP (Chemical Mechanical Polishing) residue removal. Wafer surfaces can have different types of contaminants, such as particles, organic residues, and inorganic residues. The goal of wafer cleaning is to remove the contaminants and to control the chemically grown ultralthin oxide on the surface.
In order to reach the cleaning standard, different cleaning processes and cleaning recipes have been exploited by many manufacturers. One conventional cleaning method that is RCA standard cleaning utilizes an APM (ammonium-peroxide mix) as cleaning solution comprising NH.sub.4 OH and H.sub.2 O.sub.2 at 65.degree. C. to 80.degree. C. This cleaning process is mainly applied after photoresist stripping.
In the deep sub-quarter micron CMOS (Complementary Metal-Oxide-Semiconductor) device, low resistance as well as an ultra-shallow junction of less than 40 nm are required. Referring to FIG. 1, a conventional semiconductor device is shown. A substrate 10 is provided with a gate oxide layer 22 and a polygate 20 formed thereon. In a typical process, SDE (Source/Drain Extension) regions are formed subsequently. Referring to the FIG. 1, an ion-implantation is performed for doping the semiconductor device, and implantation regions 12 are formed in the substrate 10.
However, silicon recesses 14 in active regions were found after HDD (Heavily Doped Drain) implanting. The thickness of recess silicon 14 is about 100-150 A, as shown in FIG. 1. This causes high resistance in SDE regions. Therefore, the performance and short channel characteristics of N channel MOS of and P channel MOS are seriously degraded by the recess of silicon.
In fact, the recess of silicon was caused by the attack of the RCA cleaning after the HDD implant. Because the silicon substrate 10 transfers to amorphous after the HDD implant and is then cleaned by APM solution in the RCA cleaning, the amorphous silicon substrate 10 is easily etched by a cleaning process, especially in the surface of the NMOS.
In order to solve the silicon recess issue in the substrate 10, one conventional method is to dilute the concentration of NH.sub.4 OH in the RCA solution or to reduce the immersion duration for preventing the silicon substrate from been etched. However, the silicon recess cannot be avoided in the methods of the prior art.